Update Linux kernel release to v7.2.8-2 for base and BORE kernels
Signed-off-by: Krzysztof Wilczyński <kwilczynski@omarchy.org>
This commit is contained in:
524 files changed
+147294
-88760
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@@ -0,0 +1,239 @@
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diff --git a/drivers/thunderbolt/domain.c b/drivers/thunderbolt/domain.c
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--- a/drivers/thunderbolt/domain.c
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+++ b/drivers/thunderbolt/domain.c
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@@ -788,21 +788,6 @@ int tb_domain_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
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transmit_ring, receive_path, receive_ring);
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}
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-static void tb_domain_reset_interface(struct tb *tb)
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-{
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- struct tb_nhi *nhi = tb->nhi;
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-
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- if (!nhi->ops->reset_interface)
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- return;
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-
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- guard(mutex)(&tb->lock);
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-
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- /* The reset clears the ring state so stop the control channel */
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- tb_ctl_stop(tb->ctl);
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- nhi->ops->reset_interface(nhi);
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- tb_ctl_start(tb->ctl);
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-}
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-
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/**
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* tb_domain_disconnect_xdomain_paths() - Disable DMA paths for XDomain
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* @tb: Domain disabling the DMA paths
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@@ -825,20 +810,11 @@ int tb_domain_disconnect_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
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int transmit_path, int transmit_ring,
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int receive_path, int receive_ring)
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{
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- int ret;
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-
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if (!tb->cm_ops->disconnect_xdomain_paths)
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return -ENOTSUPP;
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- ret = tb->cm_ops->disconnect_xdomain_paths(tb, xd, transmit_path,
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+ return tb->cm_ops->disconnect_xdomain_paths(tb, xd, transmit_path,
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transmit_ring, receive_path, receive_ring);
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- if (ret)
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- return ret;
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-
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- if (tb->nhi->quirks & QUIRK_RESET_DMA_ON_TEARDOWN)
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- tb_domain_reset_interface(tb);
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-
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- return 0;
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}
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static int disconnect_xdomain(struct device *dev, void *data)
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diff --git a/drivers/thunderbolt/nhi.c b/drivers/thunderbolt/nhi.c
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--- a/drivers/thunderbolt/nhi.c
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+++ b/drivers/thunderbolt/nhi.c
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@@ -1180,32 +1180,6 @@ static void nhi_reset(struct tb_nhi *nhi)
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dev_warn(nhi->dev, "timeout resetting host router\n");
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}
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-/**
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- * nhi_reset_interface() - Reset the host interface
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- * @nhi: Host interface to reset
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- *
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- * Brings the registers in the memory BAR back to their default state and
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- * clears the End-to-End Flow Control state. The caller is responsible for
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- * stopping the control channel over the reset because it clears the ring
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- * state as well.
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- */
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-void nhi_reset_interface(struct tb_nhi *nhi)
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-{
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- u32 val;
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-
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- val = ioread32(nhi->iobase + REG_CAPS);
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- /* Only v1 host interfaces implement the reset */
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- if (FIELD_GET(REG_CAPS_VERSION_MASK, val) >= REG_CAPS_VERSION_2)
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- return;
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-
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- dev_dbg(nhi->dev, "issuing host interface reset\n");
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-
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- iowrite32(REG_HOST_INTERFACE_RESET_RST,
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- nhi->iobase + REG_HOST_INTERFACE_RESET);
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- /* Wait for tHIReset (10 ms) to complete */
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- usleep_range(10000, 20000);
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-}
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-
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static struct tb *nhi_select_cm(struct tb_nhi *nhi)
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{
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struct tb *tb;
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diff --git a/drivers/thunderbolt/nhi.h b/drivers/thunderbolt/nhi.h
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--- a/drivers/thunderbolt/nhi.h
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+++ b/drivers/thunderbolt/nhi.h
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@@ -36,8 +36,6 @@ irqreturn_t nhi_msi(int irq, void *data);
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irqreturn_t ring_msix(int irq, void *data);
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int nhi_probe(struct tb_nhi *nhi);
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void nhi_shutdown(struct tb_nhi *nhi);
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-void nhi_reset_interface(struct tb_nhi *nhi);
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-
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extern const struct dev_pm_ops nhi_pm_ops;
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/**
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@@ -54,7 +52,6 @@ extern const struct dev_pm_ops nhi_pm_ops;
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* @release_ring_irq: NHI specific interrupt release hook
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* @is_present: Whether the device is currently present on the parent bus
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* @init_interrupts: NHI specific interrupt initialization hook
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- * @reset_interface: Resets the host interface
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*/
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struct tb_nhi_ops {
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int (*init)(struct tb_nhi *nhi);
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@@ -69,7 +66,6 @@ struct tb_nhi_ops {
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void (*release_ring_irq)(struct tb_ring *ring);
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bool (*is_present)(struct tb_nhi *nhi);
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int (*init_interrupts)(struct tb_nhi *nhi);
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- void (*reset_interface)(struct tb_nhi *nhi);
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};
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/*
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@@ -120,24 +116,11 @@ struct tb_nhi_ops {
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#define PCI_DEVICE_ID_INTEL_PTL_P_NHI0 0xe433
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#define PCI_DEVICE_ID_INTEL_PTL_P_NHI1 0xe434
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-#define PCI_DEVICE_ID_AMD_1AH_M60H_NHI0 0x1120
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-#define PCI_DEVICE_ID_AMD_1AH_M60H_NHI1 0x1121
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-#define PCI_DEVICE_ID_AMD_1AH_M68H_NHI0 0x113b
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-#define PCI_DEVICE_ID_AMD_1AH_M68H_NHI1 0x113c
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-#define PCI_DEVICE_ID_AMD_1AH_M80H_NHI0 0x1155
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-#define PCI_DEVICE_ID_AMD_1AH_M80H_NHI1 0x1158
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-#define PCI_DEVICE_ID_AMD_1AH_M80H_NHI2 0x1159
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-#define PCI_DEVICE_ID_AMD_1AH_M24H_NHI0 0x151c
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-#define PCI_DEVICE_ID_AMD_1AH_M24H_NHI1 0x151d
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-#define PCI_DEVICE_ID_AMD_1AH_M70H_NHI0 0x158d
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-#define PCI_DEVICE_ID_AMD_1AH_M70H_NHI1 0x158e
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-
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#define PCI_CLASS_SERIAL_USB_USB4 0x0c0340
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/* Host interface quirks */
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-#define QUIRK_AUTO_CLEAR_INT BIT(0)
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-#define QUIRK_E2E BIT(1)
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-#define QUIRK_RESET_DMA_ON_TEARDOWN BIT(2)
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+#define QUIRK_AUTO_CLEAR_INT BIT(0)
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+#define QUIRK_E2E BIT(1)
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/*
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* Minimal number of vectors when we use MSI-X. Two for control channel
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diff --git a/drivers/thunderbolt/nhi_regs.h b/drivers/thunderbolt/nhi_regs.h
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--- a/drivers/thunderbolt/nhi_regs.h
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+++ b/drivers/thunderbolt/nhi_regs.h
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@@ -115,10 +115,6 @@ struct ring_desc {
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#define REG_CAPS_VERSION_MASK GENMASK(23, 16)
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#define REG_CAPS_VERSION_2 0x40
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-/* Host Interface Reset - resets TX/RX rings and E2E flow control counters */
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-#define REG_HOST_INTERFACE_RESET 0x39858
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-#define REG_HOST_INTERFACE_RESET_RST BIT(0)
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-
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#define REG_DMA_MISC 0x39864
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#define REG_DMA_MISC_INT_AUTO_CLEAR BIT(2)
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#define REG_DMA_MISC_DISABLE_AUTO_CLEAR BIT(17)
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diff --git a/drivers/thunderbolt/pci.c b/drivers/thunderbolt/pci.c
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--- a/drivers/thunderbolt/pci.c
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+++ b/drivers/thunderbolt/pci.c
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@@ -62,27 +62,6 @@ static void nhi_pci_check_quirks(struct tb_nhi_pci *nhi_pci)
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nhi->quirks |= QUIRK_E2E;
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break;
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}
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- } else if (pdev->vendor == PCI_VENDOR_ID_AMD) {
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- switch (pdev->device) {
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- case PCI_DEVICE_ID_AMD_1AH_M60H_NHI0:
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- case PCI_DEVICE_ID_AMD_1AH_M60H_NHI1:
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- case PCI_DEVICE_ID_AMD_1AH_M68H_NHI0:
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- case PCI_DEVICE_ID_AMD_1AH_M68H_NHI1:
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- case PCI_DEVICE_ID_AMD_1AH_M80H_NHI0:
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- case PCI_DEVICE_ID_AMD_1AH_M80H_NHI1:
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- case PCI_DEVICE_ID_AMD_1AH_M80H_NHI2:
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- case PCI_DEVICE_ID_AMD_1AH_M24H_NHI0:
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- case PCI_DEVICE_ID_AMD_1AH_M24H_NHI1:
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- case PCI_DEVICE_ID_AMD_1AH_M70H_NHI0:
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- case PCI_DEVICE_ID_AMD_1AH_M70H_NHI1:
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- /*
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- * These AMD hosts may hang the Tx ring when the
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- * DMA paths are torn down so they need the host
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- * interface reset after each teardown.
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- */
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- nhi->quirks |= QUIRK_RESET_DMA_ON_TEARDOWN;
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- break;
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- }
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}
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}
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@@ -279,7 +258,6 @@ static const struct tb_nhi_ops pci_nhi_default_ops = {
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.shutdown = nhi_pci_release_irq,
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.is_present = nhi_pci_is_present,
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.init_interrupts = nhi_pci_init_msi,
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- .reset_interface = nhi_reset_interface,
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};
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/* Ice Lake specific NHI operations */
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@@ -463,7 +441,6 @@ static const struct tb_nhi_ops icl_nhi_ops = {
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.release_ring_irq = nhi_pci_ring_release_msix,
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.is_present = nhi_pci_is_present,
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.init_interrupts = nhi_pci_init_msi,
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- .reset_interface = nhi_reset_interface,
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};
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static int nhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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diff --git a/drivers/thunderbolt/quirks.c b/drivers/thunderbolt/quirks.c
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--- a/drivers/thunderbolt/quirks.c
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+++ b/drivers/thunderbolt/quirks.c
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@@ -99,6 +99,9 @@ static const struct tb_quirk tb_quirks[] = {
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quirk_usb3_maximum_bandwidth },
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{ 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_40G_BRIDGE, 0x0000, 0x0000,
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quirk_usb3_maximum_bandwidth },
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+ /* CLx is unstable on the Anker Prime TB5 dock (DROM 01ea:83b5) */
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+ { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_80G_BRIDGE, 0x01ea, 0x83b5,
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+ quirk_clx_disable },
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/*
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* Block Runtime PM in DP redrive mode for Intel Barlow Ridge host
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* controllers.
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diff --git a/drivers/thunderbolt/stream.c b/drivers/thunderbolt/stream.c
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--- a/drivers/thunderbolt/stream.c
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+++ b/drivers/thunderbolt/stream.c
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@@ -980,6 +980,9 @@ static int tbstream_dev_fops_open(struct inode *inode, struct file *file)
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}
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mutex_unlock(&sdev->lock);
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+
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+ /* Stream handles IOCB_NOWAIT just fine */
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+ file->f_mode |= FMODE_NOWAIT;
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return 0;
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err_unlock:
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diff --git a/drivers/thunderbolt/xdomain.c b/drivers/thunderbolt/xdomain.c
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--- a/drivers/thunderbolt/xdomain.c
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+++ b/drivers/thunderbolt/xdomain.c
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@@ -377,6 +377,10 @@ static int tb_xdp_properties_request(struct tb_ctl *ctl, u64 route,
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len += sizeof(res->hdr.xd_hdr) / 4;
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len -= sizeof(*res) / 4;
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+ if (len > TB_XDP_PROPERTIES_MAX_DATA_LENGTH) {
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+ ret = -EINVAL;
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+ goto err;
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+ }
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if (res->offset != req.offset) {
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ret = -EINVAL;
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