49214baae5
* linux-ptl: add package with audio, wifi, and Panel Replay SU patches
Adds the linux-ptl Omarchy package for Panther Lake (PTL) hardware.
The stock Arch linux kernel on PTL is missing: SDCA audio class
driver backports, an iwlwifi generation-data fix, and Panel Replay
SU enablement + cursor-lag workaround. Ship them in this package
until they land upstream and Arch picks them up.
Patch sets
==========
Audio (SDCA backports on 6.19.10)
0001-0005, 0007-0008, 0010, 0012-0014, 0017
Cirrus CS35L57 amps and SDCA jack on Dell XPS OLED require the
SDCA class driver plus a NULL-pointer fix (0017). Without these
the sound card never registers. 0006/0009/0011/0015/0016 from the
full upstream series are already in 6.19.10 stable and not needed.
WiFi
0018-wifi-iwlwifi-mld-correctly-set-wifi-generation-data.patch
Backport from wifi-next to fix wifi generation data reporting on
Intel AX/BE radios in PTL.
Display (PSR2 + Panel Replay SU)
0019-drm-i915-psr-accept-early-transport-for-psr2.patch
0020-drm-i915-psr-fix-su-granularity-source-for-psr2.patch
0022-drm-i915-psr-allow-psr-with-vrr-on-ptl.patch
Enable PSR2 Early Transport and fix the SU-granularity DPCD
source so PSR2 is not rejected at compute_config on OLED
panels (LGD 2880x1800 etc). Also allow PSR with VRR on PTL.
0026-drm-i915-psr-handle-Panel-Replay-full-line-SU-granul.patch
PR SU can advertise X granularity = 0xFFFF (full-line).
Without this the modulo check rejects PR SU.
0027-drm-i915-trans-push-frame-change-for-panel-replay.patch
Program TRANS_PUSH Frame Change path so PR SU cursor/plane
updates actually trigger selective updates.
0028-drm-i915-psr-exit-Panel-Replay-for-ALPM-lag.patch
Workaround for the LGD OLED panel (Dell XPS 14 DA14260,
sink OUI 00:22:b9). PR ALPM AUX-Less wake/sleep cycling on
this panel cannot resume selective updates at frame rate,
producing ~15 Hz visible motion from a 120 Hz source.
The workaround exits PR in frontbuffer_flush() and uses the
existing dc3co_work delayed_work as a 50 ms idle timer.
During continuous motion the timer is re-armed by each flush,
so the link stays awake and motion is smooth; after 50 ms of
genuine idle, dc3co_work fires and PR re-activates with ALPM
for power savings.
Compared to a per-commit exit/re-enter approach (earlier
revision of this PR), the delayed re-entry keeps video and
animation playback smooth: per-commit cycling pays the panel's
wake-to-display latency on every frame, which is visible as
playback stutter. 50 ms was chosen empirically against 100 ms
and 200 ms on the same device; 50 ms gives the best idle and
cursor-motion power while remaining subjectively identical in
smoothness to the longer delays.
Power on Dell XPS 14 OLED (LGD 2880x1800 @ 120 Hz, battery,
brightness 268/512, 10-run averaged idle):
PR SU + delayed-re-entry WA : 3268 mW (smooth)
PR SU stock (cursor laggy) : 3384 mW
PR SU + WA 100 ms : 3436 mW
PR SU + WA 200 ms : 3484 mW
PSR2 : 4060 mW (baseline)
config.x86_64 changes
=====================
Required for the kernel to boot cleanly on this hardware:
CONFIG_PINCTRL_INTEL_PLATFORM=y (was =m)
Without this the PTL GPIO controller is a late-loaded module
and early probe of CS35L57 audio amps (spk-id-gpios) and the
I2C touchpad time out with EPROBE_DEFER / -110 ETIMEDOUT.
CONFIG_VFAT_FS=y, CONFIG_FAT_FS=y, CONFIG_MSDOS_FS=y,
CONFIG_NLS_ISO8859_1=y (all were =m)
Required for the ESP /boot to mount in the initramfs / UKI
boot flow. Without these the box drops to emergency mode.
CONFIG_RUST is disabled in this package because Arch Rust 1.94.1
is too new for kernel 6.19.x Rust code.
* Backport DisplayID adaptive sync VRR parsing
* add vrr patch
* fix linux-ptl patch indentation
* linux-ptl: renumber DisplayID VRR patch
---------
Co-authored-by: Gaggery Tsai <gaggery.tsai@gmail.com>
Co-authored-by: Spencer Bull <Spencer.Bull@Dell.com>
117 lines
4.5 KiB
Diff
117 lines
4.5 KiB
Diff
From: Gaggery Tsai <gaggery.tsai@intel.com>
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Date: Thu, 17 Apr 2026 10:30:00 -0700
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Subject: [PATCH] drm/i915/psr: exit Panel Replay during updates to work around ALPM lag
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Panel Replay ALPM AUX-Less wake/sleep cycling cannot resume selective
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updates at frame rate on the LGD OLED panel in the Dell XPS 14
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DA14260. The panel's internal timing engine appears to need a
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per-frame timing beacon to resume quickly after ALPM sleep; without
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it, the source commits at 120 Hz but visible frames land around
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15 Hz.
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Work around by temporarily exiting Panel Replay in
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frontbuffer_flush() before each frame update. Re-entry into PR (with
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ALPM) is deferred by 50 ms via dc3co_work so that during continuous
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motion the link stays on (cursor/video smooth), and PR re-engages
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after 50 ms of no further updates (idle power savings preserved).
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The delay was chosen empirically:
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| Delay | Idle (10x avg) | Cursor motion (3x avg) |
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|--------|----------------|------------------------|
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| 50 ms | 3268 mW | 8749 mW |
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| 100 ms | 3436 mW | 9088 mW |
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| 200 ms | 3484 mW | 9104 mW |
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| stock | 3384 mW | ~15 Hz visible lag |
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| PSR2 | 4060 mW | 9191 mW |
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50 ms gives the best idle and cursor-motion power while remaining
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subjectively identical in smoothness to longer delays.
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Repurpose the existing dc3co_work delayed_work as the re-entry timer:
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each frontbuffer_flush cancels+rearms it to 50 ms, and the work
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handler calls intel_psr_activate() when it fires.
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Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com>
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---
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drivers/gpu/drm/i915/display/intel_frontbuffer.c | 1 +
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drivers/gpu/drm/i915/display/intel_psr.c | 33 ++++++++++++++++++
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drivers/gpu/drm/i915/display/intel_psr.h | 1 +
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3 files changed, 35 insertions(+)
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--- a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
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+++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
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@@ -97,6 +97,7 @@ static void frontbuffer_flush(struct intel_display *display,
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might_sleep();
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intel_td_flush(display);
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intel_drrs_flush(display, frontbuffer_bits);
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+ intel_psr_panel_replay_exit(display);
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intel_psr_flush(display, frontbuffer_bits, origin);
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intel_fbc_flush(display, frontbuffer_bits, origin);
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}
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--- a/drivers/gpu/drm/i915/display/intel_psr.h
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+++ b/drivers/gpu/drm/i915/display/intel_psr.h
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@@ -40,6 +40,7 @@ int intel_psr_debug_set(struct intel_dp *intel_dp, u64 value);
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void intel_psr_invalidate(struct intel_display *display,
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unsigned frontbuffer_bits,
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enum fb_op_origin origin);
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+void intel_psr_panel_replay_exit(struct intel_display *display);
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void intel_psr_flush(struct intel_display *display,
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unsigned frontbuffer_bits,
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enum fb_op_origin origin);
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--- a/drivers/gpu/drm/i915/display/intel_psr.c
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+++ b/drivers/gpu/drm/i915/display/intel_psr.c
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@@ -1217,6 +1217,8 @@ static void tgl_psr2_enable_dc3co(struct intel_dp *intel_dp)
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psr2_program_idle_frames(intel_dp, psr_compute_idle_frames(intel_dp));
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}
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+static void intel_psr_activate(struct intel_dp *intel_dp);
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+
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static void tgl_dc3co_disable_work(struct work_struct *work)
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{
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struct intel_dp *intel_dp =
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@@ -1227,6 +1229,13 @@ static void tgl_dc3co_disable_work(struct work_struct *work)
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if (delayed_work_pending(&intel_dp->psr.dc3co_work))
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goto unlock;
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+ /* Panel Replay ALPM cursor-lag workaround re-activation path. */
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+ if (intel_dp->psr.panel_replay_enabled &&
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+ intel_dp->psr.enabled && !intel_dp->psr.active) {
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+ intel_psr_activate(intel_dp);
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+ goto unlock;
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+ }
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+
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tgl_psr2_disable_dc3co(intel_dp);
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unlock:
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mutex_unlock(&intel_dp->psr.lock);
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@@ -4593,2 +4593,29 @@ u8 intel_psr_needed_vblank_count_for_frontbuffer_flush(struct intel_display *dis
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return psr_min_guardband;
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}
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+
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+/*
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+ * intel_psr_panel_replay_exit - exit Panel Replay during frontbuffer activity
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+ *
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+ * Exits PR on frontbuffer flush and arms dc3co_work with a 50 ms
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+ * delay. Each subsequent flush cancels and rearms the timer. When it
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+ * finally fires, tgl_dc3co_disable_work re-activates PR.
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+ */
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+void intel_psr_panel_replay_exit(struct intel_display *display)
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+{
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+ struct intel_encoder *encoder;
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+
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+ for_each_intel_encoder_with_psr(display->drm, encoder) {
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+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
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+
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+ mutex_lock(&intel_dp->psr.lock);
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+ if (intel_dp->psr.panel_replay_enabled &&
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+ intel_dp->psr.sel_update_enabled) {
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+ if (intel_dp->psr.active)
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+ intel_psr_exit(intel_dp);
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+ mod_delayed_work(display->wq.unordered,
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+ &intel_dp->psr.dc3co_work,
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+ msecs_to_jiffies(50));
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+ }
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+ mutex_unlock(&intel_dp->psr.lock);
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+ }
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+}
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