24 lines
1.1 KiB
Diff
24 lines
1.1 KiB
Diff
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
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--- a/drivers/gpu/drm/i915/display/intel_display.c
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+++ b/drivers/gpu/drm/i915/display/intel_display.c
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@@ -2452,6 +2452,19 @@ static int intel_crtc_set_context_latency(struct intel_crtc_state *crtc_state)
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set_context_latency = max(set_context_latency,
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intel_psr_min_set_context_latency(crtc_state));
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+ /*
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+ * From PTL onwards, the set context latency can be in the vactive
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+ * region, letting the safe window start some lines before the vblank
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+ * start. With modes that have a smaller vblank region, the computed
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+ * guardband is clamped to the vblank length, making the undelayed and
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+ * delayed vblank coincide. If the SCL is also 0, the 'safe window'
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+ * becomes effectively 0, and the DSB configured to wait for it gets
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+ * stalled, since the hardware never signals the safe window. Keep the
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+ * set context latency at a minimum of 1 to avoid this.
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+ */
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+ if (DISPLAY_VER(display) >= 30)
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+ set_context_latency = max(1, set_context_latency);
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+
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return set_context_latency;
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}
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