29 lines
1.1 KiB
Diff
29 lines
1.1 KiB
Diff
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
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index 1aed121f4ddb..081de37c2083 100644
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--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
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+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
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@@ -216,8 +216,9 @@ int amdgpu_smu_pptable_id = -1;
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* DISABLE_FRACTIONAL_PWM (bit 2) disabled by default
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* PSR (bit 3) disabled by default
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* EDP NO POWER SEQUENCING (bit 4) disabled by default
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+ * FRL (bit 10) enabled by default
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*/
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-uint amdgpu_dc_feature_mask = 2;
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+uint amdgpu_dc_feature_mask = DC_MULTI_MON_PP_MCLK_SWITCH_MASK | DC_FRL_MASK;
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uint amdgpu_dc_debug_mask;
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uint amdgpu_dc_visual_confirm;
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int amdgpu_async_gfx_ring = 1;
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diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h
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index 3fd38323a88b..bdd80c5e378e 100644
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--- a/drivers/gpu/drm/amd/include/amd_shared.h
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+++ b/drivers/gpu/drm/amd/include/amd_shared.h
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@@ -287,7 +287,7 @@ enum DC_FEATURE_MASK {
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*/
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DC_REPLAY_MASK = (1 << 9),
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/**
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- * @DC_FRL_MASK: (0x400) disabled by default
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+ * @DC_FRL_MASK: (0x400) enabled by default
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*/
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DC_FRL_MASK = (1 << 10),
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};
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