Merge pull request #93 from alvarofraguas/macbook8-spi-nodma-dkms
Add macbook8-spi-pxa2xx-nodma-dkms package
This commit is contained in:
@@ -0,0 +1,3 @@
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{
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"source": "local"
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}
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@@ -0,0 +1,9 @@
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obj-m := spi_pxa2xx_pci_nodma.o
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spi_pxa2xx_pci_nodma-objs := spi-pxa2xx-pci-nodma.o
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EXTRA_CFLAGS += -I$(src)
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all:
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$(MAKE) -C /lib/modules/$(KERNELRELEASE)/build M=$(PWD) modules
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clean:
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$(MAKE) -C /lib/modules/$(KERNELRELEASE)/build M=$(PWD) clean
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@@ -0,0 +1,34 @@
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# Maintainer: Alvaro Fraguas <alvarofraguas@gmail.com>
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_pkgbase=spi-pxa2xx-pci-nodma
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pkgname=macbook8-spi-pxa2xx-nodma-dkms
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pkgver=1.0
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pkgrel=1
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pkgdesc="Patched SPI PXA2xx PCI driver forcing PIO mode for MacBook8,1 Wildcat Point GSPI (8086:9ce6)"
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arch=('x86_64')
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url="https://github.com/basecamp/omarchy"
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license=('GPL-2.0-only')
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depends=('dkms' 'linux-headers')
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makedepends=()
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conflicts=('spi_pxa2xx_pci' 'macbook12-spi-driver-dkms')
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provides=('spi_pxa2xx_pci_nodma')
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source=("spi-pxa2xx-pci-nodma.c"
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"spi-pxa2xx.h"
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"Makefile"
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"dkms.conf"
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"macbook8-spi-nodma.conf")
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sha256sums=('ffe04ab2c5d51db36b39eba05ace5faaf33d5004f46608f4fa06343ba873038b'
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'011221bcaae0b8ca2634c3b2624b83b8a7bd94b37427fcd95548b3db705d5ec3'
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'f9d1e48f6a18168105a6f6991953125cdf41457de178c00fe7378376ec11f12f'
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'9fb4503571118d6e128387b99e371fc1f9401fe192f215c5b976a81c4937c514'
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'455d3a9985928a5abc21452ca70c845d9203ec26c8826962607cdfbc2f34d86c')
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package() {
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# DKMS source files
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install -Dm644 "${srcdir}/spi-pxa2xx-pci-nodma.c" "${pkgdir}/usr/src/${_pkgbase}-${pkgver}/spi-pxa2xx-pci-nodma.c"
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install -Dm644 "${srcdir}/spi-pxa2xx.h" "${pkgdir}/usr/src/${_pkgbase}-${pkgver}/spi-pxa2xx.h"
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install -Dm644 "${srcdir}/Makefile" "${pkgdir}/usr/src/${_pkgbase}-${pkgver}/Makefile"
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install -Dm644 "${srcdir}/dkms.conf" "${pkgdir}/usr/src/${_pkgbase}-${pkgver}/dkms.conf"
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# Modprobe blacklist: prevent the in-tree spi_pxa2xx_pci from claiming this device
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install -Dm644 "${srcdir}/macbook8-spi-nodma.conf" "${pkgdir}/usr/lib/modprobe.d/macbook8-spi-nodma.conf"
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}
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@@ -0,0 +1,6 @@
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PACKAGE_NAME="spi-pxa2xx-pci-nodma"
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PACKAGE_VERSION="1.0"
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BUILT_MODULE_NAME[0]="spi_pxa2xx_pci_nodma"
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BUILT_MODULE_LOCATION[0]="."
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DEST_MODULE_LOCATION[0]="/kernel/drivers/spi"
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AUTOINSTALL="yes"
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@@ -0,0 +1,5 @@
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# MacBook8,1 SPI keyboard/trackpad fix:
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# Blacklist the in-tree spi_pxa2xx_pci so our PIO-mode version
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# (spi_pxa2xx_pci_nodma) binds to the Wildcat Point GSPI instead.
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blacklist spi_pxa2xx_pci
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install spi_pxa2xx_pci /bin/true
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@@ -0,0 +1,351 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* PCI glue driver for SPI PXA2xx compatible controllers.
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* CE4100's SPI device is more or less the same one as found on PXA.
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*
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* Copyright (C) 2016, 2021 Intel Corporation
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*/
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#include <linux/clk-provider.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/sprintf.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/dmaengine.h>
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#include <linux/platform_data/dma-dw.h>
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#include "spi-pxa2xx.h"
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#define PCI_DEVICE_ID_INTEL_QUARK_X1000 0x0935
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#define PCI_DEVICE_ID_INTEL_BYT 0x0f0e
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#define PCI_DEVICE_ID_INTEL_MRFLD 0x1194
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#define PCI_DEVICE_ID_INTEL_BSW0 0x228e
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#define PCI_DEVICE_ID_INTEL_BSW1 0x2290
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#define PCI_DEVICE_ID_INTEL_BSW2 0x22ac
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#define PCI_DEVICE_ID_INTEL_CE4100 0x2e6a
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#define PCI_DEVICE_ID_INTEL_LPT0_0 0x9c65
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#define PCI_DEVICE_ID_INTEL_LPT0_1 0x9c66
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#define PCI_DEVICE_ID_INTEL_LPT1_0 0x9ce5
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#define PCI_DEVICE_ID_INTEL_LPT1_1 0x9ce6
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struct pxa_spi_info {
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int (*setup)(struct pci_dev *pdev, struct pxa2xx_spi_controller *c);
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};
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static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
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static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
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static struct dw_dma_slave mrfld3_tx_param = { .dst_id = 15 };
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static struct dw_dma_slave mrfld3_rx_param = { .src_id = 14 };
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static struct dw_dma_slave mrfld5_tx_param = { .dst_id = 13 };
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static struct dw_dma_slave mrfld5_rx_param = { .src_id = 12 };
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static struct dw_dma_slave mrfld6_tx_param = { .dst_id = 11 };
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static struct dw_dma_slave mrfld6_rx_param = { .src_id = 10 };
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static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
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static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
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static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
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static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
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static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
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static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
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static struct dw_dma_slave lpt1_tx_param = { .dst_id = 0 };
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static struct dw_dma_slave lpt1_rx_param = { .src_id = 1 };
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static struct dw_dma_slave lpt0_tx_param = { .dst_id = 2 };
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static struct dw_dma_slave lpt0_rx_param = { .src_id = 3 };
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static void pxa2xx_spi_pci_clk_unregister(void *clk)
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{
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clk_unregister(clk);
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}
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static int pxa2xx_spi_pci_clk_register(struct pci_dev *dev, struct ssp_device *ssp,
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unsigned long rate)
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{
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char buf[40];
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snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
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ssp->clk = clk_register_fixed_rate(&dev->dev, buf, NULL, 0, rate);
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if (IS_ERR(ssp->clk))
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return PTR_ERR(ssp->clk);
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return devm_add_action_or_reset(&dev->dev, pxa2xx_spi_pci_clk_unregister, ssp->clk);
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}
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static bool lpss_dma_filter(struct dma_chan *chan, void *param)
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{
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struct dw_dma_slave *dws = param;
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if (dws->dma_dev != chan->device->dev)
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return false;
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chan->private = dws;
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return true;
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}
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static void lpss_dma_put_device(void *dma_dev)
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{
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pci_dev_put(dma_dev);
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}
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static int lpss_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
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{
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struct ssp_device *ssp = &c->ssp;
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struct dw_dma_slave *tx, *rx;
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struct pci_dev *dma_dev;
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int ret;
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switch (dev->device) {
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case PCI_DEVICE_ID_INTEL_BYT:
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ssp->type = LPSS_BYT_SSP;
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ssp->port_id = 0;
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c->tx_param = &byt_tx_param;
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c->rx_param = &byt_rx_param;
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break;
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case PCI_DEVICE_ID_INTEL_BSW0:
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ssp->type = LPSS_BSW_SSP;
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ssp->port_id = 0;
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c->tx_param = &bsw0_tx_param;
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c->rx_param = &bsw0_rx_param;
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break;
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case PCI_DEVICE_ID_INTEL_BSW1:
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ssp->type = LPSS_BSW_SSP;
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ssp->port_id = 1;
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c->tx_param = &bsw1_tx_param;
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c->rx_param = &bsw1_rx_param;
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break;
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case PCI_DEVICE_ID_INTEL_BSW2:
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ssp->type = LPSS_BSW_SSP;
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ssp->port_id = 2;
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c->tx_param = &bsw2_tx_param;
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c->rx_param = &bsw2_rx_param;
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break;
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case PCI_DEVICE_ID_INTEL_LPT0_0:
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case PCI_DEVICE_ID_INTEL_LPT1_0:
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ssp->type = LPSS_LPT_SSP;
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ssp->port_id = 0;
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c->tx_param = &lpt0_tx_param;
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c->rx_param = &lpt0_rx_param;
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break;
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case PCI_DEVICE_ID_INTEL_LPT0_1:
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case PCI_DEVICE_ID_INTEL_LPT1_1:
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ssp->type = LPSS_LPT_SSP;
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ssp->port_id = 1;
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c->tx_param = &lpt1_tx_param;
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c->rx_param = &lpt1_rx_param;
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break;
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default:
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return -ENODEV;
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}
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c->num_chipselect = 1;
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ret = pxa2xx_spi_pci_clk_register(dev, ssp, 50000000);
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if (ret)
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return ret;
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dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
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ret = devm_add_action_or_reset(&dev->dev, lpss_dma_put_device, dma_dev);
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if (ret)
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return ret;
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tx = c->tx_param;
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tx->dma_dev = &dma_dev->dev;
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tx->m_master = 0;
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tx->p_master = 1;
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rx = c->rx_param;
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rx->dma_dev = &dma_dev->dev;
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rx->m_master = 0;
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rx->p_master = 1;
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/* MacBook8,1 GSPI: disable DMA, use IRQ-polled PIO mode */
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c->dma_filter = NULL;
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c->dma_burst_size = 0;
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c->enable_dma = 0;
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return 0;
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}
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static const struct pxa_spi_info lpss_info_config = {
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.setup = lpss_spi_setup,
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};
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static int ce4100_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
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{
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struct ssp_device *ssp = &c->ssp;
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ssp->type = PXA25x_SSP;
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ssp->port_id = dev->devfn;
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c->num_chipselect = dev->devfn;
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return pxa2xx_spi_pci_clk_register(dev, ssp, 3686400);
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}
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static const struct pxa_spi_info ce4100_info_config = {
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.setup = ce4100_spi_setup,
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};
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static int mrfld_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
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{
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struct ssp_device *ssp = &c->ssp;
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struct dw_dma_slave *tx, *rx;
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struct pci_dev *dma_dev;
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int ret;
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ssp->type = MRFLD_SSP;
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switch (PCI_FUNC(dev->devfn)) {
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case 0:
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ssp->port_id = 3;
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c->num_chipselect = 1;
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c->tx_param = &mrfld3_tx_param;
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c->rx_param = &mrfld3_rx_param;
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break;
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case 1:
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ssp->port_id = 5;
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c->num_chipselect = 4;
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c->tx_param = &mrfld5_tx_param;
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c->rx_param = &mrfld5_rx_param;
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break;
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case 2:
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ssp->port_id = 6;
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c->num_chipselect = 1;
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c->tx_param = &mrfld6_tx_param;
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c->rx_param = &mrfld6_rx_param;
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break;
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default:
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return -ENODEV;
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}
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ret = pxa2xx_spi_pci_clk_register(dev, ssp, 25000000);
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if (ret)
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return ret;
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dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(21, 0));
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ret = devm_add_action_or_reset(&dev->dev, lpss_dma_put_device, dma_dev);
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if (ret)
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return ret;
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tx = c->tx_param;
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tx->dma_dev = &dma_dev->dev;
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rx = c->rx_param;
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rx->dma_dev = &dma_dev->dev;
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c->dma_filter = lpss_dma_filter;
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c->dma_burst_size = 8;
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c->enable_dma = 1;
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return 0;
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}
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static const struct pxa_spi_info mrfld_info_config = {
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.setup = mrfld_spi_setup,
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};
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static int qrk_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
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{
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struct ssp_device *ssp = &c->ssp;
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ssp->type = QUARK_X1000_SSP;
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ssp->port_id = dev->devfn;
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c->num_chipselect = 1;
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return pxa2xx_spi_pci_clk_register(dev, ssp, 50000000);
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}
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static const struct pxa_spi_info qrk_info_config = {
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.setup = qrk_spi_setup,
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};
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static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
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const struct pci_device_id *ent)
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{
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const struct pxa_spi_info *info;
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int ret;
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struct pxa2xx_spi_controller *pdata;
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struct ssp_device *ssp;
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ret = pcim_enable_device(dev);
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if (ret)
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return ret;
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pdata = devm_kzalloc(&dev->dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return -ENOMEM;
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ssp = &pdata->ssp;
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ssp->dev = &dev->dev;
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ssp->phys_base = pci_resource_start(dev, 0);
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ssp->mmio_base = pcim_iomap_region(dev, 0, "PXA2xx SPI");
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if (IS_ERR(ssp->mmio_base))
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return PTR_ERR(ssp->mmio_base);
|
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|
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info = (struct pxa_spi_info *)ent->driver_data;
|
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ret = info->setup(dev, pdata);
|
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if (ret)
|
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return ret;
|
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|
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pci_set_master(dev);
|
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|
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ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES);
|
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if (ret < 0)
|
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return ret;
|
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ssp->irq = pci_irq_vector(dev, 0);
|
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|
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ret = pxa2xx_spi_probe(&dev->dev, ssp, pdata);
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if (ret)
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return ret;
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pm_runtime_set_autosuspend_delay(&dev->dev, 50);
|
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pm_runtime_use_autosuspend(&dev->dev);
|
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pm_runtime_put_autosuspend(&dev->dev);
|
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pm_runtime_allow(&dev->dev);
|
||||
|
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return 0;
|
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}
|
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|
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static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
|
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{
|
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pm_runtime_forbid(&dev->dev);
|
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pm_runtime_get_noresume(&dev->dev);
|
||||
|
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pxa2xx_spi_remove(&dev->dev);
|
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}
|
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|
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static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
|
||||
{ PCI_DEVICE_DATA(INTEL, QUARK_X1000, &qrk_info_config) },
|
||||
{ PCI_DEVICE_DATA(INTEL, BYT, &lpss_info_config) },
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{ PCI_DEVICE_DATA(INTEL, MRFLD, &mrfld_info_config) },
|
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{ PCI_DEVICE_DATA(INTEL, BSW0, &lpss_info_config) },
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{ PCI_DEVICE_DATA(INTEL, BSW1, &lpss_info_config) },
|
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{ PCI_DEVICE_DATA(INTEL, BSW2, &lpss_info_config) },
|
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{ PCI_DEVICE_DATA(INTEL, CE4100, &ce4100_info_config) },
|
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{ PCI_DEVICE_DATA(INTEL, LPT0_0, &lpss_info_config) },
|
||||
{ PCI_DEVICE_DATA(INTEL, LPT0_1, &lpss_info_config) },
|
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{ PCI_DEVICE_DATA(INTEL, LPT1_0, &lpss_info_config) },
|
||||
{ PCI_DEVICE_DATA(INTEL, LPT1_1, &lpss_info_config) },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
|
||||
|
||||
static struct pci_driver pxa2xx_spi_pci_driver = {
|
||||
.name = "pxa2xx_spi_pci",
|
||||
.id_table = pxa2xx_spi_pci_devices,
|
||||
.driver = {
|
||||
.pm = pm_ptr(&pxa2xx_spi_pm_ops),
|
||||
},
|
||||
.probe = pxa2xx_spi_pci_probe,
|
||||
.remove = pxa2xx_spi_pci_remove,
|
||||
};
|
||||
|
||||
module_pci_driver(pxa2xx_spi_pci_driver);
|
||||
|
||||
MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_IMPORT_NS("SPI_PXA2xx");
|
||||
MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
|
||||
@@ -0,0 +1,141 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
|
||||
* Copyright (C) 2013, 2021 Intel Corporation
|
||||
*/
|
||||
|
||||
#ifndef SPI_PXA2XX_H
|
||||
#define SPI_PXA2XX_H
|
||||
|
||||
#include <linux/dmaengine.h>
|
||||
#include <linux/irqreturn.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/sizes.h>
|
||||
|
||||
#include <linux/pxa2xx_ssp.h>
|
||||
|
||||
struct device;
|
||||
struct gpio_desc;
|
||||
|
||||
/*
|
||||
* The platform data for SSP controller devices
|
||||
* (resides in device.platform_data).
|
||||
*/
|
||||
struct pxa2xx_spi_controller {
|
||||
u8 num_chipselect;
|
||||
u8 enable_dma;
|
||||
u8 dma_burst_size;
|
||||
bool is_target;
|
||||
|
||||
/* DMA engine specific config */
|
||||
dma_filter_fn dma_filter;
|
||||
void *tx_param;
|
||||
void *rx_param;
|
||||
|
||||
/* For non-PXA arches */
|
||||
struct ssp_device ssp;
|
||||
};
|
||||
|
||||
struct spi_controller;
|
||||
struct spi_device;
|
||||
struct spi_transfer;
|
||||
|
||||
struct driver_data {
|
||||
/* SSP Info */
|
||||
struct ssp_device *ssp;
|
||||
|
||||
/* SPI framework hookup */
|
||||
enum pxa_ssp_type ssp_type;
|
||||
struct spi_controller *controller;
|
||||
|
||||
/* PXA hookup */
|
||||
struct pxa2xx_spi_controller *controller_info;
|
||||
|
||||
/* SSP masks*/
|
||||
u32 dma_cr1;
|
||||
u32 int_cr1;
|
||||
u32 clear_sr;
|
||||
u32 mask_sr;
|
||||
|
||||
/* DMA engine support */
|
||||
atomic_t dma_running;
|
||||
|
||||
/* Current transfer state info */
|
||||
void *tx;
|
||||
void *tx_end;
|
||||
void *rx;
|
||||
void *rx_end;
|
||||
u8 n_bytes;
|
||||
int (*write)(struct driver_data *drv_data);
|
||||
int (*read)(struct driver_data *drv_data);
|
||||
irqreturn_t (*transfer_handler)(struct driver_data *drv_data);
|
||||
|
||||
void __iomem *lpss_base;
|
||||
|
||||
/* Optional slave FIFO ready signal */
|
||||
struct gpio_desc *gpiod_ready;
|
||||
};
|
||||
|
||||
static inline u32 pxa2xx_spi_read(const struct driver_data *drv_data, u32 reg)
|
||||
{
|
||||
return pxa_ssp_read_reg(drv_data->ssp, reg);
|
||||
}
|
||||
|
||||
static inline void pxa2xx_spi_write(const struct driver_data *drv_data, u32 reg, u32 val)
|
||||
{
|
||||
pxa_ssp_write_reg(drv_data->ssp, reg, val);
|
||||
}
|
||||
|
||||
#define DMA_ALIGNMENT 8
|
||||
|
||||
static inline int pxa25x_ssp_comp(const struct driver_data *drv_data)
|
||||
{
|
||||
switch (drv_data->ssp_type) {
|
||||
case PXA25x_SSP:
|
||||
case CE4100_SSP:
|
||||
case QUARK_X1000_SSP:
|
||||
return 1;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void clear_SSCR1_bits(const struct driver_data *drv_data, u32 bits)
|
||||
{
|
||||
pxa2xx_spi_write(drv_data, SSCR1, pxa2xx_spi_read(drv_data, SSCR1) & ~bits);
|
||||
}
|
||||
|
||||
static inline u32 read_SSSR_bits(const struct driver_data *drv_data, u32 bits)
|
||||
{
|
||||
return pxa2xx_spi_read(drv_data, SSSR) & bits;
|
||||
}
|
||||
|
||||
static inline void write_SSSR_CS(const struct driver_data *drv_data, u32 val)
|
||||
{
|
||||
if (drv_data->ssp_type == CE4100_SSP ||
|
||||
drv_data->ssp_type == QUARK_X1000_SSP)
|
||||
val |= read_SSSR_bits(drv_data, SSSR_ALT_FRM_MASK);
|
||||
|
||||
pxa2xx_spi_write(drv_data, SSSR, val);
|
||||
}
|
||||
|
||||
extern int pxa2xx_spi_flush(struct driver_data *drv_data);
|
||||
|
||||
#define MAX_DMA_LEN SZ_64K
|
||||
#define DEFAULT_DMA_CR1 (SSCR1_TSRE | SSCR1_RSRE | SSCR1_TRAIL)
|
||||
|
||||
extern irqreturn_t pxa2xx_spi_dma_transfer(struct driver_data *drv_data);
|
||||
extern int pxa2xx_spi_dma_prepare(struct driver_data *drv_data,
|
||||
struct spi_transfer *xfer);
|
||||
extern void pxa2xx_spi_dma_start(struct driver_data *drv_data);
|
||||
extern void pxa2xx_spi_dma_stop(struct driver_data *drv_data);
|
||||
extern int pxa2xx_spi_dma_setup(struct driver_data *drv_data);
|
||||
extern void pxa2xx_spi_dma_release(struct driver_data *drv_data);
|
||||
|
||||
int pxa2xx_spi_probe(struct device *dev, struct ssp_device *ssp,
|
||||
struct pxa2xx_spi_controller *platform_info);
|
||||
void pxa2xx_spi_remove(struct device *dev);
|
||||
|
||||
extern const struct dev_pm_ops pxa2xx_spi_pm_ops;
|
||||
|
||||
#endif /* SPI_PXA2XX_H */
|
||||
Reference in New Issue
Block a user